Statistical Modelling of 14nm N-types MOSFET
Keywords:
14 nm n-type MOSFET, High k-dielectric, Silvaco TCAD Tools, Taguchi Method,Abstract
This paper focuses on virtual modelling and optimization of 14nm n-types planar MOSFET. Here, high-k dielectric and metal gate were used where the high-k material is Hafnium Dioxide (HfO2) and the metal gate is Tungsten Silicide (WSi2). 36 simulations of Taguchi L9 Orthogonal Array method were applied in order to obtain the best parameter design for optimization of both performance parameters which are threshold voltage (VTH) and leakage current (IOFF). The simulation and fabrication for n-type transistor was conducted through Virtual Wafer Fabrication (VWF) Silvaco TCAD Tools named ATHENA and ATLAS for its electrical characterization. For analyzation of the impact parameters on VTH and IOFF, two noise parameters and four process parameters value were varied. From the simulations, the results show the best value were well within ITRS prediction where VTH and IOFF are 0.236737 V and 6.995705 nA/um respectivelyReferences
H.A. Elgomathi, B. Yeop Majlis, F. Salehuddin, I. Ahmad, A, Zaharim, F.A. Hamid,“Optimizing 35nm NMOS Devices Vth and Ileak by Controlling Active Area and Halo Implantation Dosage,” RSM2011 Proc., pp. 286-290, 2011.
Bin Yu, Haihog Wang, Amol Joshi, et. al, “15nm Gate Length Planar CMOS Transistor,” IEEE-IEDM, pp.937-939, 2001.
Noor Faizah Z.A, I. Ahmad, P.J. Ker, et. al, “Modeling of 14 nm Gate Length n-Type MOSFET,” IEEE-RSM Proc, 2015.
H.A. Elgomati, B.Y. Majlis, A.M. Abdul Hamid, et. al., “Modelling of
Process Parameters for 32nm PMOS Transistor Using Taguchi
Method”, Sixth Asia Modelling Symposium, 2012.
Afifah Maheran A.H., Menon P.S., I. Ahmad, H.A. Elgomati, B.Y. Majlis, F. Salehuddin, “Scaling Down the 32 nm Gate Length NMOS Transistor to 22nm,” IEEE-ICSE Proc.,pp. 191-194, 2012.
Ibrahim Ahmad, Yeap Kim Ho, Burahanuddin Yeop Majlis,
“Fabrication and Characterization of a 0.14 um CMOS device using ATHENA and ATLAS simulators,” Semiconductor Physics, Quantum Electronic& Optoelectronics, vol. 9, pp. 40-44, 2006.
H.A. Elgomathi, B. Yeop Majlis, F. Salehuddin, I. Ahmad, A, Zaharim, F.A. Hamid, “Optimizing 35nm NMOS Devices Vth and Ileak by Controlling Active Area and Halo Implantation Dosage,” RSM2011 Proc., pp. 286-290, 2011.
X. Chen, S. Samavedam, V. Narayanan, K. Stein, C. Hobbs, “A Cost Effective 32mn High-K/Metal Gate CMOS technology for Low Power Applications with Single-Metal/Gate-First Process,” Symposium on VLSI Technology Digest of Technical Papers, pp. 88-89, 2008.
Afifah Maheran A.H., Menon P.S., I.Ahmad , H.A.Elgomati, B.Y. Majlis, F.Salehuddin, “Design and Optimization of 22nm NMOS Transistor,” Australian Journal of Basic and Applied Sciences, pp.1-8, 2012.
Norani Bte Atan, Ibrahim Bin Ahmad, Burhanuddin Bin Yeop Majlis and Izzati Binti Ahmad Fauzi, “Effects of High-K Dielectric with Metal Gate for Electrical Characteristics of Nanostructured NMOS,”
International Conference on Engineering and ICT (ICEI 2014), pp.1-5, 2014.
Downloads
Published
How to Cite
Issue
Section
License
TRANSFER OF COPYRIGHT AGREEMENT
The manuscript is herewith submitted for publication in the Journal of Telecommunication, Electronic and Computer Engineering (JTEC). It has not been published before, and it is not under consideration for publication in any other journals. It contains no material that is scandalous, obscene, libelous or otherwise contrary to law. When the manuscript is accepted for publication, I, as the author, hereby agree to transfer to JTEC, all rights including those pertaining to electronic forms and transmissions, under existing copyright laws, except for the following, which the author(s) specifically retain(s):
- All proprietary right other than copyright, such as patent rights
- The right to make further copies of all or part of the published article for my use in classroom teaching
- The right to reuse all or part of this manuscript in a compilation of my own works or in a textbook of which I am the author; and
- The right to make copies of the published work for internal distribution within the institution that employs me
I agree that copies made under these circumstances will continue to carry the copyright notice that appears in the original published work. I agree to inform my co-authors, if any, of the above terms. I certify that I have obtained written permission for the use of text, tables, and/or illustrations from any copyrighted source(s), and I agree to supply such written permission(s) to JTEC upon request.