Application of Taguchi Method in Optimization of Shallow PN Junction Formation


  • Maria Mansor
  • F. Salehuddin
  • I. Ahmad
  • Zulkifli Mansor
  • K.E. Kaharudin
  • Nasaruddin Mohammad
  • N.Amizan Abd Rahman
  • A.S Mohd Zain
  • N. Idris
  • N.Z Haron


Shallow PN Junction, Tauchi Method, Silvaco TCAD, Spin on Dopant, Spin on Glass


In this research, optimization of shallow PN junction formation through dopan diffusion from Spin on Dopant (SOD)in Ultra Large Scale Integrated (ULSI) technology by using taguchi method was investigated.The shallow junction formation by using the polysilicon/Si structures has the advantages of lower sheet resistance in comparison with the conventional Si junction. Boron and phosphorus diffusion into silicon from SOD sources has been investigated using conventionalfurnace and rapid thermal diffusion. Diffusivity of boron inSOD was found to be much faster than in the normal oxide,and it was slower in the Si. Process simulation for shallow PNjunction was used Silvaco TCAD Tools. The shallow PN junction with junction depth below than 30nm has been produced using rapid thermal diffusion. From the simulation result, the value of Sheet resistance (Rs) and Junction depth (Xj) were analyzed by using L18 orthogonal array (OA) in Taguchi Method. Control factors that were used namely material, time and temperature. The analysis of variance shows the process parameter of material,and temperature is significant based on 95% confidence level towards junction depth and sheet resistance respond in the shallow PN junction device. So that the junction depth and sheet resistance decreased follows the material and temperature. As conclusion, taguchi method can be utilized to find optimum solution in fabricating to get a good performing device


How to Cite

Mansor, M., Salehuddin, F., Ahmad, I., Mansor, Z., Kaharudin, K., Mohammad, N., Abd Rahman, N., Mohd Zain, A., Idris, N., & Haron, N. (2015). Application of Taguchi Method in Optimization of Shallow PN Junction Formation. Journal of Telecommunication, Electronic and Computer Engineering (JTEC), 5(2), 33–38. Retrieved from




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