The Impact of Gate-Induced Drain Leakage (GIDL) on Scaled MOSFETs for Low Power Device

Abstract

In this research, we investigated the impact of Gate-Induced Drain Leakage (GIDL) on scaled Metal-OxideSemiconductor Field-Effect Transistor (MOSFET) for low power application. The output of this research determined the implications of GIDL on the performance of MOSFET with various sizes that are supplied via low voltage power. The MOSFET design parameters were proposed by referring to the International Technology Roadmap for Semiconductors (ITRS), 2011 edition. SILVACO’s DEVEDIT and ATLAS software was used for this research to design a device structure and obtain output characteristics. Three MOSFETs with different physical gate length and several other parameters were designed and simulated. From the extracted data, it shows that as the size of MOSFET physical gate length become smaller, the leakage current tends to be higher. Apart from GIDL current (IGIDL) value, the “ON” current (ION) value and threshold voltage (VTH) value also been extracted for all MOSFET designs.