Application of Taguchi-based Grey Fuzzy Logic for Simultaneous Optimization in TiO2/WSix-based Vertical Double-gate MOSFET

Authors

  • K.E. Kaharudin Centre for Telecommunication Research and Innovation, Faculty of Electronics and Computer Engineering, Universiti Teknikal Malaysia Melaka (UTeM), Hang Tuah Jaya, Durian Tunggal, 76100 Melaka
  • F. Salehuddin Centre for Telecommunication Research and Innovation, Faculty of Electronics and Computer Engineering, Universiti Teknikal Malaysia Melaka (UTeM), Hang Tuah Jaya, Durian Tunggal, 76100 Melaka
  • A.S. M.Zain Centre for Telecommunication Research and Innovation, Faculty of Electronics and Computer Engineering, Universiti Teknikal Malaysia Melaka (UTeM), Hang Tuah Jaya, Durian Tunggal, 76100 Melaka
  • M.N.I. A.Aziz Centre for Telecommunication Research and Innovation, Faculty of Electronics and Computer Engineering, Universiti Teknikal Malaysia Melaka (UTeM), Hang Tuah Jaya, Durian Tunggal, 76100 Melaka

Keywords:

ANOVA, GFRG, Off-Current, On-Current,

Abstract

This present study focuses on finding the optimal process parameters, considering multiple electrical properties of titanium dioxide/tungsten silicide (TiO 2 /WSi x )-based vertical double-gate MOSFET via L 9 orthogonal array (OA) Taguchibased grey fuzzy logic. Four process parameters that are V TH implant energy, halo implant dose, source/drain (S/D) implant dose and S/D implant tilt angle, are optimized to obtain the most desired value of on-current (I ON ), off-current (IOFF ) and subthreshold slope (SS). The design of experiment (DoE) is based on the L 9 OA of Taguchi method and the experimental value for multiple electrical characteristics are represented by a grey fuzzy reasoning grade (GFRG). The most optimal level of four process parameters towards I ON , IOFF and SS are chosen based on the highest GFRG. The results of analysis of variance (ANOVA) show that the most dominant process parameter is S/D implant tilt angle with 96.76% factor effect on GFRG. The most optimal value for ION , IOFF and SS after the optimization are 1589.2 µA/µm, 8.483E-10 A/µm and 68.21 mV/dec respectively with 0.564 of GFRG.

References

ITRS, “International Technology Roadmap Semiconductor,” 2013.

C. Y. Chen, J. T. Lin, and M. H. Chiang, “Comparative study of process variations in junctionless and conventional double-gate MOSFETs,” in IEEE Nanotechnology Materials and Devices Conference, IEEE NMDC 2013, 2013, pp. 1–2.

H. Ramakrishnan, “Variability: Analysis and Impact on Circuit Response,” 2009.

K. E. Kaharudin, A. H. Hamidon, and F. Salehuddin, “Design and Optimization Approaches in Double Gate Device Architecture,” Int. J. Eng. Technol., vol. 6, no. 5, pp. 2070–2079, 2014.

N. A. F. Othman, F. N. N. Azhari, S. F. W. M. Hatta, and N. Soin, “The Application of Taguchi Method on the Robust Optimization of p-FinFET Device Parameters,” in IEEE International Conference on Semiconductor Electronics (ICSE), 2016, pp. 141–144.

F. Salehuddin, A. S. M. Zain, N. M. Idris, A. K. M. Yamin, A. M. A. Hamid, I. Ahmad, and P. S. Menon, “Analysis of Threshold Voltage Variance in 45nm N-Channel Device Using L27 Orthogonal Array Method,” Adv. Mater. Res., vol. 903, pp. 297–302, Feb. 2014.

F. Salehuddin, K. E. Kaharudin, A. S. M. Zain, A. K. M. Yamin, and I. Ahmad, “Analysis of process parameter effect on DIBL in n channel MOSFET device using L27 orthogonal array,” in International Conferences on Fundamental and Applied Sciences, AIP Conf. Proc., 2014, vol. 1621, no. 1, pp. 322–328.

A. H. Afifah Maheran, P. S. Menon, I. Ahmad, and S. Shaari, “Optimisation of Process Parameters for Lower Leakage Current in 22 nm n-type MOSFET Device using Taguchi Method,” J. Teknol., vol. 68, no. 4, pp. 1–5, 2014.

A. H. Afifah Maheran, P. S. Menon, I. Ahmad, S. Shaari, H. A. Elgomati, and F. Salehuddin, “Design and Optimization of 22 nm Gate Length High-k/Metal gate NMOS Transistor,” J. Phys. Conf. Ser., vol. 431, pp. 1–9, 2013.

M. A. Wahid, B. O. P. Soepangkat, and B. Pramujati, “Multi Response Optimization in Face Milling Process of ASSAB XW-42 Tool Steel with Liquid Nitrogen Cooling using Taguchi-Grey-Fuzzy Method,” ARPN J. Eng. Appl. Sci., vol. 11, no. 4, pp. 2711–2717, 2016.

V. Kumar and R. Ramanujam, “Experimental Investigation and Optimization of Wear Characteristics of Metal Matrix Composites,” Int. J. Innov. Sci. Eng. Technol., vol. 2, no. 5, pp. 288–293, 2015.

N. Lusi, K. Muzaka, B. Oedy, and P. Soepangkat, “Parametric Optimization of Wire Electrical Discharge Machining Process on AISI H13 Tool Steel using Weigthed Principal Component Analysis (WPCA) and Taguchi Method,” ARPN J. Eng. Appl. Sci., vol. 11, no. 2, pp. 945–951, 2016.

S. Tamang and M. Chandrasekaran, “Application of grey fuzzy logic for simultaneous optimization of surface roughness and metal removal rate in turning Al-SiCp metal matrix composites,” in 5th International & 26th All India Manufacturing Technology, Design and Research Conference (AIMTDR 2014), 2014, pp. 832–1–832–7.

K. E. Kaharudin, F. Salehuddin, A. S. M. Zain, and M. N. I. A. Aziz, “Taguchi Modeling with the interaction test for higher drive current in WSix/TIO2 channel vertical double gate NMOS device,” J. Theor. Appl. Inf. Technol., vol. 90, no. 1, pp. 185–193, 2016.

K. E. Kaharudin, F. Salehuddin, A. S. M. Zain, M. N. I. A. Aziz, Z. Manap, N. A. A. Salam, and W. H. M. Saad, “Multi-response optimization in vertical double gate PMOS device using Taguchi method and grey relational analysis,” in IEEE International Conference on Semiconductor Electronics (ICSE), 2016, pp. 64–68.

V. K. Yadav and A. K. Rana, “Impact of Channel Doping on DGMOSFET Parameters in Nano Regime-TCAD Simulation,” Int. J. Comput. Appl., vol. 37, no. 11, pp. 36–41, 2012.

V. C. Sekhar, S. A. Hussain, V. Pandurangadu, and T. S. Rao, “Grey Relational Analysis to Determine Optimum Process Parameters of „ Emu ‟ Feather Fiber Reinforced Epoxy Composites,” Int. J. Emerg. Technol. Adv. Eng., vol. 5, no. 8, pp. 86–90, 2015.

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Published

2017-09-27

How to Cite

Kaharudin, K., Salehuddin, F., M.Zain, A., & A.Aziz, M. (2017). Application of Taguchi-based Grey Fuzzy Logic for Simultaneous Optimization in TiO2/WSix-based Vertical Double-gate MOSFET. Journal of Telecommunication, Electronic and Computer Engineering (JTEC), 9(2-13), 23–28. Retrieved from https://jtec.utem.edu.my/jtec/article/view/2560

Issue

Vol. 9 No. 2-13: Research and Innovation towards Sustainability in Electronic Engineering

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Articles

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