Bi-directional of a Built-in Test Circuit for Interconnect Defects in Assembled PCBs

Authors

  • Lailis Syafaah Muhammadiyah University of Malang, Indonesia
  • Widianto Widianto Muhammadiyah University of Malang, Indonesia
  • Hiroyuki Yotsuyanagi The University of Tokushima, Japan
  • Masaki Hashizume The University of Tokushima, Japan

Keywords:

Bi-directional, PCB, Spice Simulator, IC,

Abstract

Bi-directional of a built-in test circuit is proposed to detect open defects at inputs and output interconnects between ICs and a PCB. The test circuit is based on an electrical characteristic of an inverter gate. A test method is related to supply current which flows to the inverter by providing a test signal to the test circuit. The test signal is generated by an AC voltage signal with a DC offset voltage. The open defects which occur at the interconnects will be detected by the large supply current flows to the inverter. On the other hand, if the defects don't occur, the supply current of the inverter is almost zero. Testability of the test circuit is examined using a Spice simulation. The results show that the open defects at the interconnects can be detected and located.

References

Pandher, R., Pachamuthu, A., “Effect of Multiple Reflow Cycles on

Solder Joint Formation and Reliability”, SMTA International

Conference, pp. 112-117, 2010.

Amir, D., Walwadkar, S., Aravamudhan, S., May, L., “The

Challenges Non Wet Open BGA Solder Defect”, SMTA International

Conference, pp. 684-694, 2012.

Maunder, C.M., Tullos, R.E. “The Test Access Port and BoundaryScan Architecture”, IEEE Computer Society Press, 1990.

Bleeker, H., van den Eijnden, P. “Boundary Scan Test A Practical Approach”, Kluwer Academic Publishers, 1993.

Parker, K.P., “Defect Coverage of Boundary Scan Test What does it mean when a Boundary-Scan Test Passes”, ITC, pp. 181-189, 2003.

Jianbiao, P., “A Control-Chart Based Method for Solder Joint Crack

Detection”, Journals of Microelectronics and Electronic Packaging, Vol. 11, pp. 94-103, 2014.

Pan, J., Silk, J., “A Study of Solder Joint Failure Criteria”,

International Symposium on Microelectronics, pp. 694-702, 2011.

Kwon, D., Azarian, M.H., Pecht, M.G., “Detection of Solder Joint Degradation Using RF Impedance Analysis”, Electronics Component and Technology Conference, pp. 606-610, 2008.

Kwon, D., Azarian, M.H., Pecht, M.G., “Detection of Solder Joint Failure Precursors in Tin-Lead and Lead-Free Assemblies using RF Impedance Analysis”, Electronics Component and Technology Conference, pp. 663-667, 2009.

Widianto, Yotsuyanagi, H., Ono, A., Takagi, M., Roth, Z.,

Hashizume, M., “A built-in Electrical Test Circuit for Interconnect

Test in Assembled PCBs”, IEEE CPMT, pp. 201-204, 2012.

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Published

2017-03-15

How to Cite

Syafaah, L., Widianto, W., Yotsuyanagi, H., & Hashizume, M. (2017). Bi-directional of a Built-in Test Circuit for Interconnect Defects in Assembled PCBs. Journal of Telecommunication, Electronic and Computer Engineering (JTEC), 9(1-3), 31–34. Retrieved from https://jtec.utem.edu.my/jtec/article/view/1738

Issue

Vol. 9 No. 1-3: Smart City Technology in Communication and Computer Engineering I

Section

Articles

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