Impact of Stress and Material Porosity on Double Boost DC-DC Converter Technology to Enhance Field-Effect Heterotransistors and Heterodiodes Density

Abstract

Currently, several critical issues in solid-state electronics, such as improving the performance, reliability and density of integrated circuits elements like diodes, field-effect transistors, and bipolar transistors are being intensively addressed. One effective approach to reduce the dimensions of integrated circuits elements is to manufacture them in thin film heterostructures with an optimal manufacturing regime. In this paper, we explore methods to increase the density of field-effect heterotransistors and heterodiodes in the framework of a double boost DC-DC converter. We consider manufacturing this converter in a heterostructure with a specific configuration, where several required areas of the heterostructure should be doped by diffusion or ion implantation. Subsequently, the dopant and radiation defects should be annealed using an optimized scheme. Based on this approach, we provide recommendations for determining the optimal annealing time to achieve the best compromise between increasing density of integrated circuits elements and minimizing local overheating during their operation. We also propose a method to reduce the mismatch-induced stress in the heterostructure. We present an analytical approach to analyze mass and heat transport in heterostructures during the manufacturing of integrated circuits, accounting for mismatch-induced stress. This approach allows for the consideration of spatial and temporal variations in the parameters of technological processes, as well as their nonlinearity.