Analysis of Crosstalk Noise for 2π RC Model considering Interconnect Parameters in Deep Submicron VLSI Circuit
Keywords:Deep sub-micron, VLSI, Interconnects, Crosstalk noise, 2? RC model,
AbstractAs the technology enters into deep sub-micron region, signal integrity is becoming a very crucial parameter. In order to deal with the challenges associated with signal integrity problem, such as, crosstalk noise and delay, estimation and minimizing techniques should be addressed with great importance. Along with this, the peak noise amplitude and noise width values in the sensitive node must be verified and confirmed that they are below the certain threshold levels. Hence, for a particular range of frequency, an accurate and efficient crosstalk noise estimation model is necessary to confirm the signal integrity. Therefore, this work aims to analyse the crosstalk noise between two interconnect lines using 2π RC model, and considering its physical parameters, such as the parasitic capacitance, resistance and inductance and interconnect parameters, specifically the spacing between two interconnects, length, width, thickness, height from substrate in deep sub-micron VLSI circuit. In this paper, analytical expressions for peak noise amplitude and noise width in 2π model with RC interconnects for unit step input were derived, and then it was simulated in MATLAB and HSPICE software platform. The MATLAB based results represent that 2π model possesses less errors, and showed better performance compared to some other popular models by adjusting the interconnecting parameters for any certain range of operating frequency. The HSPICE simulation justifies the accuracy of the approach with full satisfaction.
D. Pandini, C. Forzen, and L. Baldi, "Design methodologies and architecture solutions for high-performance Interconnects," in in Proc. IEEEInt. Conf. on Computer Design (ICCD’04), San Jose, California,USA., 2004, pp. 152–159.
D. Sylvester and K. Keutzer , "Getting to the Bottom of Deep Submicron II: A Global Wiring Paradigm," in In Proceedings of the 1999 international symposium on Physical design, Monterey, California, USA, 1990, pp. 193-200.
S. R. P. R Datla, "Crosstalk Delay Analysis in Very Deep Sub Micron VLSI Circuits," New Delhi, , 2004.
B.K.V. Sharma, D. Blaauw, and S. Sirichotiyakul, "Estimation of the Likelihood of Capacitive Coupling Noise," in In IEEE 2002 Design Automation Conference, New Orleans, LA, USA, 2002, pp. 653-658.
J. Cong, "Challenges and Opportunities for Design Innovations in Nanometer Technologies,” ," in In Semiconductor Research Corporation Design Sciences Concept Paper, January 1998, pp. 1 - 15.
P. D. Gross , R Arunachalam , K. Rajgopal , and L. T. i Pilegg, "Determination of Worst-Case Aggressor Alignment for Delay Calculatio,” IEEE," in In Proceedings of the IEEE/ACM International Conference on Computer Aided Design, San Jose, California, USA, 1998.
A. B. Kalpana and P.V. Hunagund, "Crosstalk Noise Modeling for RC and RLC Interconnects in Deep Sub-Micron VLSI Circuits," Journal of Computing, vol. 2, no. 4, pp. 60-65, 2010.
L. Vendrame, "Crosstalk-based capacitance Measurements: Theory and Applications," IEEE Transactions on Semiconductor Manufacturing, vol. 19, no. 1, pp. 67-77, 2006.
A. Devgan, "Efficient Coupled Noise Estimation for On-Chip Interconnects,”.," in In IEEE/ACM International Conference on Computer-Aided Design (Digest of Technical Papers), San Jose, CA, USA., 1997, pp. 147-153.
A. Vittal and M. Marek-Sadowska, "Crosstalk Reduction for VLSI," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 16, pp. 290-298, 1997.
P. Heydari and M. Pedram, "Capacitive Coupling in High-Speed VLSI Circuits," IEEE Trans. Computer Aided Design Integrated Circuits System, vol. 24, no. 3, pp. 478-488, March 2005.
M. Kuhlmann, S.S. Sapatnekar , and KK. Parhi, "Exact and Efficient Crosstalk Estimation," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 20, no. 7, pp. 858-866, 2001.
A. B. Kalpana and P.V. Hunagund, "Circuit Model for Interconnect Crosstalk Noise Estimation in High Speed Integrated Circuits," Advance in Electronic and Electric Engineering, vol. 3, no. 8, pp. 907-912, 2013.
K. Nageswara Rao, G. Nath Veerendra, and K. Hari Kishore, "Crosstalk noise minimization in novel through silicon via structures," International Journal of Engineering & Technology, vol. 7, no. 2.8, pp. 56-62, 2018.
A. V. Tsarev, "Efficient silicon wire waveguide crossing with negligible loss and crosstalk," Opt. Expres, vol. 19, no. 15, pp. , no. 15, pp. 13 732–13 737, 2011.
X. Wang, M. Xiong, and Z. Chen, "Wideband Capacitance Evaluation of Silicon-Insulator-Silicon Through-Silicon-Vias for 3D Integration Applications," IEEE Electron Device Letters, vol. 37, no. 2, February 2016.
G. K. Mekala, R. Chandel, and R. Chande, "An Efficient Crosstalk Model For Coupled Multiwalled Carbon Nanotube Interconnects," in IEEE Transactions on Electromagnetic Compatibility , July 2017, pp. 1-10.
Md. Maniruzzaman, A. Sarkar, R. N. Toma, and M. T. Hasan, "Estimation of Crosstalk Noise for 2pi RC and RLC Interconnects," International Journal of Engineering Research and Development, vol. 11, no. 10, pp. 16-27, October 2015.
W.C. Elmore, "The Transient Response of Wideband Amplifiers," Journal of Applied Physics, vol. 19, no. 1, 1948.
Semiconductor Corp., "International Technology Roadmap for Semiconductors (ITRS), 2015 [Online]," Available: http:// http://www.itrs2.net.
How to Cite
TRANSFER OF COPYRIGHT AGREEMENT
The manuscript is herewith submitted for publication in the Journal of Telecommunication, Electronic and Computer Engineering (JTEC). It has not been published before, and it is not under consideration for publication in any other journals. It contains no material that is scandalous, obscene, libelous or otherwise contrary to law. When the manuscript is accepted for publication, I, as the author, hereby agree to transfer to JTEC, all rights including those pertaining to electronic forms and transmissions, under existing copyright laws, except for the following, which the author(s) specifically retain(s):
- All proprietary right other than copyright, such as patent rights
- The right to make further copies of all or part of the published article for my use in classroom teaching
- The right to reuse all or part of this manuscript in a compilation of my own works or in a textbook of which I am the author; and
- The right to make copies of the published work for internal distribution within the institution that employs me
I agree that copies made under these circumstances will continue to carry the copyright notice that appears in the original published work. I agree to inform my co-authors, if any, of the above terms. I certify that I have obtained written permission for the use of text, tables, and/or illustrations from any copyrighted source(s), and I agree to supply such written permission(s) to JTEC upon request.