An FPGA Approach for EXP-BET Metrics Computation Using Simulink Blockset

Abstract

This paper proposes the process of simulating the mathematical model of the EXP-BET scheduling algorithm using MATLAB Simulink configured with Xilinx System Generator (XSG). The system generator provides Simulink blockset for several hardware operations that could be implemented on various Xilinx FPGAs. The method describes in this paper involves the calculation of metrics equation for EXPBET scheduling algorithm and the model is developed using constant values for all the parameters in the equations. Many applications that are DSP based require mathematical modeling for easy understanding and analysis. Furthermore, the need of instant prototyping tools such as MATLAB Simulink and Xilinx System Generator has become increasingly important because of the limitation for time-to-market. This can greatly reduce the process cycle from the algorithm to the hardware implementation. The output of the simulation demonstrated that the EXP-BET metrics computation was successfully accomplished.