A Simple THD Minimization Technique for Transistor-Clamped H-Bridge-Based Cascaded Multilevel Inverter

Authors

  • Wahidah Abd. Halim Faculty of Electrical Engineering, Universiti Teknikal Malaysia Melaka, Melaka, Malaysia
  • Nasrudin Abd. Rahim UM Power Energy Dedicated Advanced Centre (UMPEDAC), University of Malaya, Kuala Lumpur, Malaysia
  • Azrita Alias Faculty of Electrical Engineering, Universiti Teknikal Malaysia Melaka, Melaka, Malaysia

Keywords:

Multilevel Inverter, Total Harmonic Distortion (THD), THD Minimization,

Abstract

This paper presents a simple modulation technique that minimizes the output voltage total harmonic distortion (THD) without eliminating the lowest order harmonics. It uses the voltage-angle equal concept of sinusoidal reference waveform to generate the step output voltage of a single-phase transistor-clamped H-bridge (TCHB)-based cascaded multilevel inverter. The real implementation of the modulation technique for a various range of modulation indices is built using an Altera field-programmable gate array (FPGA). It is found that the proposed modulation method resulted in a dramatic decrease in the inverter’s output voltage THD when increasing the number of output steps up to thirteen levels.

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Published

2018-01-22

How to Cite

Abd. Halim, W., Abd. Rahim, N., & Alias, A. (2018). A Simple THD Minimization Technique for Transistor-Clamped H-Bridge-Based Cascaded Multilevel Inverter. Journal of Telecommunication, Electronic and Computer Engineering (JTEC), 10(1-3), 69–74. Retrieved from https://jtec.utem.edu.my/jtec/article/view/3490

Issue

Vol. 10 No. 1-3: Moving Towards Industry 4.0 II

Section

Articles

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