Chek Yee, Ooi, and Lim Soo King. “Simulation Study on Different Logic Families of NOT Gate Transistor Level Circuits Implemented Using Nano-MOSFETs”. Journal of Telecommunication, Electronic and Computer Engineering (JTEC) 8, no. 5 (August 1, 2016): 61–67. Accessed July 22, 2024. https://jtec.utem.edu.my/jtec/article/view/765.