Haron, N. Z., S. A. Mat Junos@Yunus, and A. H. Abdul Razak. “Modeling and Simulation of Finite State Machine Memory Built-In Self Test Architecture for Embedded Memories”. Journal of Telecommunication, Electronic and Computer Engineering (JTEC), vol. 1, no. 1, Sept. 2015, pp. 77-82, https://jtec.utem.edu.my/jtec/article/view/511.