Syafaah, L., Widianto, W., Yotsuyanagi, H. and Hashizume, M. (2017) “Bi-directional of a Built-in Test Circuit for Interconnect Defects in Assembled PCBs”, Journal of Telecommunication, Electronic and Computer Engineering (JTEC), 9(1-3), pp. 31–34. Available at: https://jtec.utem.edu.my/jtec/article/view/1738 (Accessed: 27April2024).