Jali, M. H. (2013) “Design of Gain Booster for Sample and Hold Stage of High Speed-Low Power Pipelined Analog-to-Digital Converter”, Journal of Telecommunication, Electronic and Computer Engineering (JTEC), 5(1), pp. 23–29. Available at: https://jtec.utem.edu.my/jtec/article/view/481 (Accessed: 22July2024).