HARON, N. Z.; MAT JUNOS@YUNUS, S. A.; ABDUL RAZAK, A. H. Modeling and Simulation of Finite State Machine Memory Built-In Self Test Architecture for Embedded Memories. Journal of Telecommunication, Electronic and Computer Engineering (JTEC), [S. l.], v. 1, n. 1, p. 77–82, 2015. Disponível em: https://jtec.utem.edu.my/jtec/article/view/511. Acesso em: 7 jul. 2022.