Z. A, N. F.; AHMAD, I.; KER, P.; MENON, P.; A.H., A. M. VTH and ILEAK Optimization Using Taguchi Method at 32nm Bilayer Graphene PMOS. Journal of Telecommunication, Electronic and Computer Engineering (JTEC), [S. l.], v. 9, n. 2-7, p. 105–109, 2017. Disponível em: https://jtec.utem.edu.my/jtec/article/view/2601. Acesso em: 4 may. 2024.