SYAFAAH, L.; WIDIANTO, W.; YOTSUYANAGI, H.; HASHIZUME, M. Bi-directional of a Built-in Test Circuit for Interconnect Defects in Assembled PCBs. Journal of Telecommunication, Electronic and Computer Engineering (JTEC), [S. l.], v. 9, n. 1-3, p. 31–34, 2017. Disponível em: https://jtec.utem.edu.my/jtec/article/view/1738. Acesso em: 29 may. 2024.