JALI, M. H. Design of Gain Booster for Sample and Hold Stage of High Speed-Low Power Pipelined Analog-to-Digital Converter. Journal of Telecommunication, Electronic and Computer Engineering (JTEC), [S. l.], v. 5, n. 1, p. 23–29, 2013. Disponível em: https://jtec.utem.edu.my/jtec/article/view/481. Acesso em: 26 dec. 2024.