H.R, A.; BYRAREDDY, C. R.; C. P, N. Design of an Efficient AXI-4 Protocol for High Speed SOC Applications on FPGA Platform. Journal of Telecommunication, Electronic and Computer Engineering (JTEC), [S. l.], v. 12, n. 3, p. 61–68, 2020. Disponível em: https://jtec.utem.edu.my/jtec/article/view/5774. Acesso em: 21 nov. 2024.