Haron, N. Z., Mat Junos@Yunus, S. A., & Abdul Razak, A. H. (2015). Modeling and Simulation of Finite State Machine Memory Built-In Self Test Architecture for Embedded Memories. Journal of Telecommunication, Electronic and Computer Engineering (JTEC), 1(1), 77–82. Retrieved from https://jtec.utem.edu.my/jtec/article/view/511