TY - JOUR AU - Syafaah, Lailis AU - Widianto, Widianto AU - Yotsuyanagi, Hiroyuki AU - Hashizume, Masaki PY - 2017/03/15 Y2 - 2024/03/28 TI - Bi-directional of a Built-in Test Circuit for Interconnect Defects in Assembled PCBs JF - Journal of Telecommunication, Electronic and Computer Engineering (JTEC) JA - JTEC VL - 9 IS - 1-3 SE - Articles DO - UR - https://jtec.utem.edu.my/jtec/article/view/1738 SP - 31-34 AB - Bi-directional of a built-in test circuit is proposed to detect open defects at inputs and output interconnects between ICs and a PCB. The test circuit is based on an electrical characteristic of an inverter gate. A test method is related to supply current which flows to the inverter by providing a test signal to the test circuit. The test signal is generated by an AC voltage signal with a DC offset voltage. The open defects which occur at the interconnects will be detected by the large supply current flows to the inverter. On the other hand, if the defects don't occur, the supply current of the inverter is almost zero. Testability of the test circuit is examined using a Spice simulation. The results show that the open defects at the interconnects can be detected and located. ER -