@article{Kim Ho_Kai Meng_Koon Chun_Peh Chiong_Nisar_Rizman_2016, title={Design and Analysis of 15 nm MOSFETs}, volume={8}, url={https://jtec.utem.edu.my/jtec/article/view/1426}, abstractNote={We present the design and analysis of 15 nm NMOS transistors, fabricated on three different substrate materials -- namely silicon, indium nitride and indium arsenide. Close inspection on the I-V characteristic curves reveals that the saturation voltage and current of the indium arsenide transistors are significantly higher than the other two counterparts. We attribute this result to the high mobility of carriers in indium arsenide substrate. It is also observed that the breakdown voltages of the indium arsenide transistors are also one of the highest. The breakdown behaviour shows that transistors fabricated on indium arsenide substrate renders reasonably high robustness. Due to high channel length modulation effect, it could also be seen that current variation between saturation and breakdown currents is the highest in the conventional silicon transistors. Our analysis suggests that indium arsenide could be an alternative substrate material in the design and fabrication of nano-scale MOSFETs. For devices which may require high power consumption (and therefore high current and voltage), indium arsenide can also be considered as an appropriate substrate material.}, number={12}, journal={Journal of Telecommunication, Electronic and Computer Engineering (JTEC)}, author={Kim Ho, Yeap and Kai Meng, Mui and Koon Chun, Lai and Peh Chiong, Teh and Nisar, Humaira and Rizman, Zairi Ismael}, year={2016}, month={Dec.}, pages={1–4} }